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Abstract
The semiconductor industry's transition to smaller design rules and copper/low-k interconnects - along with the introduction of new materials and the larger, 300 mm wafer size - is redefining defect management's role on the fab production floor. This is particularly true below the 130 nm node. Not only are smaller defects having a greater impact on device yields at these geometries, but the ratio of nuisance defects to yield-limiting defects has also become higher. The amount of inspection needed to ensure that each key process step is performed within tolerance on each layer is also increasing. KLA-Tencor has designed a new patterned wafer inspection platform - the AIT Fusion UV - to address these challenges on 300 mm wafers at the 90 nm node and below.