1. Introduction
The rapid advancement of display technologies has driven surging demand for high-performance light-emitting devices with exceptional resolution, energy efficiency, and compactness, particularly for applications such as augmented reality (AR), virtual reality (VR), next-generation wearables, and automotive displays [1,2]. Among the pivotal materials enabling these innovations, III-nitride semiconductors—notably indium gallium nitride (InGaN)—exhibit unique advantages, including a direct bandgap tunable from deep ultraviolet to near-infrared via alloy composition control, high breakdown voltage, superior thermal conductivity, and radiation resistance [3,4,5,6,7,8]. These properties underpin their dominance in modern optoelectronic applications, from lighting to high-power electronics. A critical milestone in this field is the commercialization of InGaN-based blue and green light-emitting diodes (LEDs), which has paved the way for GaN-based micro-light-emitting diodes (micro-LEDs) as next-generation display technology [9]. Compared to conventional liquid crystal displays (LCDs) and organic LEDs (OLEDs), micro-LEDs demonstrate unparalleled potential advantages, including brightness, extended operational lifetime, ultrafast response times, reduced power consumption, and robust thermal stability, positioning them as transformative solutions for AR/VR, wearables, and automotive interfaces [10].
The performance of GaN-based micro-LEDs is intrinsically linked to substrate selection. While sapphire substrates remain widely used for LED applications due to their high crystalline quality, their limitations—including high cost and mainly its lack of compatibility with silicon-based CMOS processes—have spurred interest in silicon substrates [11]. Silicon offers cost efficiency, scalability for large-area production, and seamless integration with established semiconductor manufacturing, which could be key to production-cost reduction and improved device throughput [12]. However, GaN-on-Si technology faces substantial challenges, particularly in realizing efficient red-emitting micro-LEDs. The large lattice mismatch and thermal expansion coefficient disparity between GaN and silicon generate high dislocation densities, wafer bowing, and cracking during epitaxial growth, severely degrading the crystalline quality and device efficiency [13]. These issues are exacerbated in red-emitting devices, which demand high indium content in InGaN active layers to achieve longer wavelengths. Increased indium incorporation intensifies lattice strain, inducing defects and reducing quantum efficiency. Furthermore, the miniaturized dimensions of micro-LEDs amplify fabrication-related challenges, such as surface damage, sidewall defect formation, and non-radiative carrier recombination, collectively limiting the reliability and efficiency of InGaN red micro-LEDs on silicon substrates.
A particularly critical aspect in the development of GaN-based micro-LEDs lies in the SiO2 layer passivation process using plasma-enhanced chemical vapor deposition (PECVD). The passivation treatment is widely used for providing electrical isolation, preventing leakage prevention, and even enabling direct bonding, which commonly requires SiO2 or SiNx thin film deposition. Additionally, the activation and stabilization of p-type GaN (p-GaN) layers also play a significant role in the micro-LED device performance [14]. Magnesium (Mg) doping is the most widely used method to achieve p-type conductivity in GaN [15]. During the epitaxial growth process, however, Mg acceptors form complexes with hydrogen, resulting in electrical passivation [16]. Post-growth annealing, typically performed at temperatures between 600 °C and 800 °C, is required to break the Mg-H bonds and release hydrogen atoms, activating the Mg acceptors [17,18]. This activation step is essential for enabling efficient hole injection, a prerequisite for LED operation. However, during subsequent device fabrication steps, hydrogen can be unintentionally reintroduced into the p-GaN layer through processes such as plasma etching or chemical treatments. In this study, the H produced by PECVD during the deposition of the SiO2 layer, as well as the H ion (plasma), will cause the inactivation of p-GaN. Hydrogen diffusion into the lattice facilitates the reformation of Mg-H complexes, effectively deactivating the p-type conductivity. The source of the H element is mainly divided into two parts. One is due to the large lattice mismatch between GaN and Si substrate, which causes crystal surface defects and large differences in thermal expansion coefficients, therefore forming suspended bonds [19,20]. The other is due to the sidewall damage caused by etching, which makes H more easily escape into the p-GaN layer [21,22]. This phenomenon significantly degrades the electrical performance and efficiency of GaN-based LEDs, particularly in scaled devices where small dimensions make them more susceptible to surface-related issues [23]. Moreover, the InGaN red micro-LED on silicon substrates, because of the higher In component, the crystal defect density of p-GaN growth is higher. The lattice mismatch between InGaN and GaN reaches about 4.4% when the indium content reaches 40%, resulting in a significant biaxial compressive strain in InGaN multiple quantum wells (MQWs), which remarkably affects the crystal quality, alloy composition, and luminous efficiency [24]. The additional lattice mismatch strain energy caused by the introduction of abundant indium atoms may gradually accumulate as the InGaN thickness increases. Part of the strain energy will be released in the form of interface misfit dislocations once reaching the critical thickness and may also intrigue the formation of structural defects such as TDs, voids, trench defects, and stacking faults [25]. These adverse effects possibly make it easier to let hydrogen penetrate the p-GaN material, subsequently resulting in inactivation.
To address the challenges associated with the degradation of devices, several strategies have been proposed and developed. Wet etching techniques are commonly employed to minimize surface damage and improve the quality of sidewalls in micro-LEDs [26]. Deposition of passivation layers proves to be an excellent solution for the effect of decreasing efficiency and current leakage induced by the sidewall effects [27]. Kim et al. applied AlN/Al2O3 deposition on p-GaN to achieve LEDs with enhanced light-emission efficiency and reduced leakage current [28]. Furthermore, Lee et al. demonstrated that the combination of ALD-Al2O3 and PECVD-SiO2 as a passivation layer outperforms the PECVD-SiO2 layer alone in suppressing sidewall effects [29]. Additionally, at lower current densities, the dual-layer passivation structure achieves peak external quantum efficiency, outperforming the single-layer passivation in terms of performance [30,31].
Dielectric materials, such as aluminum oxide (Al2O3) and hafnium oxide (HfO2), have shown exceptional promise as passivation solutions [32,33]. These materials offer a combination of low hydrogen permeability, excellent thermal and chemical stability, and high dielectric constants, making them an ideal candidate for passivation in red-emitting micro-LEDs [34]. ALD offers exceptional precision and uniformity in depositing high-k metal-oxide films, making it ideal for applications requiring atomic-scale control over thin film thickness. In particular, ALD enables the deposition of high-quality films with excellent interface control while maintaining high performance and low defectivity.
This study systematically explores the use of metal-oxide dielectric layers in enhancing the performance of the p-type layer of the InGaN red micro-LEDs on silicon substrates through advanced passivation techniques. By integrating high-density metal-oxide dielectric ALD processes with relatively established fabrication methods, we aim to mitigate hydrogen-induced degradation on the p-GaN layer, which is induced during the growth of SiO2 via PECVD, to improve device efficiency and reliability. The morphology of the cross-section, as well as the electrical and optical properties of the device, were characterized using scanning electron microscopy (SEM), current-voltage (I-V) measurements, and electroluminescence (EL) analysis in order to thoroughly evaluate the device performance.
2. Materials and Methods
2.1. InGaN Epilayers and Schematic of the Device Process
The red-emitting micro-LED epi wafers and devices were fabricated by Suzhou Hanhua Semiconductor Co., Ltd. (Suzhou, China). The epitaxial layers were grown via metal-organic chemical vapor deposition (MOCVD) on 8-inch silicon substrates. The epitaxial structure is illustrated in Figure 1a.
The epitaxial growth commenced with a low-temperature AlN layer, which served as a nucleation layer for subsequent growth. A 1.5-µm-thick unintentionally doped (UID) AlGaN-based layer was then grown until surface coalescence was achieved, followed by the deposition of a 1.0-µm-thick n-type GaN contact layer with a Si doping concentration of 5 × 1018 cm−3. A 200-nm InGaN-based strain-relief layer and the active region (multiple quantum wells, MQWs) were subsequently deposited on the n-type GaN contact layer. Above the active region, a p-type electron-blocking layer, p-type GaN, and p-type GaN contact layer were grown, all doped with Mg. Post-growth annealing was performed ex-situ to dissociate Mg-H complexes and release hydrogen atoms, thereby activating the Mg acceptors in the p-GaN layer. The total epitaxial thickness is 3.2 µm, grown on a 1150-µm-thick silicon substrate.
Following epitaxial growth, the wafer was characterized using photoluminescence (PL) with a 375-nm-wavelength laser as an excitation source. The LED wafer was then processed into devices. The devices adopted a flip-chip architecture [35], with a cross-sectional structure shown in Figure 1b. To simplify the structure in the following text, the epi layer is designated as GaN micro-LED.
In our previous work [36], we established a set of optimized red micro-LED fabrication processes on a planar sapphire substrate. Building upon these experiences, in this paper, we followed a similar process to develop red LEDs on silicon substrates. Initially, organic and acid cleaning was performed to remove surface contaminants. A 100-nm-thick indium tin oxide (ITO) layer was deposited on the p-GaN via electron beam evaporation at room temperature, followed by annealing at 550 °C in an oxygen ambient for 1 min to improve ohmic contact formation. For mesa formation, a combination of photolithography and a photoresist hard mask was employed, followed by inductively coupled plasma (ICP) etching for patterning. Chlorine-based ICP reactive ion etching was utilized to form the LED mesa, reaching the n-GaN layer. Then, a grid-patterned n-contact was subsequently deposited on the exposed n-GaN regions between LEDs. Subsequently, a 2-µm-thick SiO2 passivation layer was deposited via (PECVD) within multiple steps, and chemical mechanical polishing (CMP) was performed after each deposition to ensure surface planarity and uniformity. Above the ITO layer, the SiO2 layer and the interconnected anode metal layer collectively exhibit a total thickness of 1.5 µm. A schematic of the described fabrication flow used in this paper is shown in Figure 1c.
2.2. Dielectric Layer Passivation Treatment on Decreased Electrical Performance
Following the fabrication of the p-electrode, ICP etching combined with photolithography was employed to define mesa structures with precise depths to facilitate subsequent n-electrode formation. Subsequently, a SiO2 passivation layer was deposited via PECVD. Prior to completing the full device fabrication process, only one opportunity existed for verification—IV characterization via probe station after ITO annealing—to assess both ohmic contact quality and p-GaN activation. Previous tests after Step 3, described in Section 2.1, which is designed for verification of forward opening voltage and ohmic contact performance between ITO and p-GaN, show satisfactory results. However, after adopting Step 4 to silicon substrates, device failures manifested as non-functional under normal operating voltages (around 2 V). For micro-LEDs, electrical performance directly governs photoelectronic conversion efficiency; thus, some potential failure mechanisms may include increased forward voltage due to degraded p-GaN activity during processing.
To identify the root cause, fabrication Step 4, described in Figure 1c, was systematically investigated. For testing consistency, large-area 1 mm × 1 mm square p-electrode patterns were lithographically defined to facilitate probing and microscopic characterization, following the process of ICP etching to form mesa structure. Post-processing, wafers were diced to isolate test-piece structures. Subsequently, four distinct PECVD deposition protocols were tested to study the potential impact of the PECVD SiO2 deposition process. In the process, silicon from decomposed SiH4 reacted with oxygen species to form SiO2. By varying the N2O/N2 flow ratio (two groups at 1:1 and two at 2:1) and reaction temperature (two groups at 350 °C and two at 200 °C) while maintaining constant RF power, the deposition rate was set as 50.28 nm/min (20-min deposition). After etching 1 μm of SiO2 in buffered oxide etch (BOE), I-V characterization via probe station revealed preserved ITO conductivity (confirmed by probing lithographically patterned regions), while p-GaN activation tests using 1.5-mm-diameter indium balls as p-contacts exhibited abnormally higher forward voltages and lower current densities, as is shown in Figure 2a. The comparison of the forward opening voltage of mesa on the p-GaN layer was measured by the probe station. The blue lines and red lines, respectively, represent the situation before and after the deposition of the SiO2 dielectric layer by PECVD. After PECVD deposition, the original forward opening voltage is between 1 and 2 V; the luminescence condition under the microscope is shown in Figure 2b. However, after SiO2 deposition, this index is increased to about 3 V. Under the microscope, it directly appears as a dim luminescence, as is shown in Figure 2c. These results indicated hydrogen-induced reactivation of p-GaN during SiO2 deposition, leading to p-layer deactivation and device failure.
It is suggested that hydrogen species generated during SiH4 decomposition in PECVD—even under increased N2 inert gas flow—severely impacted p-GaN. Two contributing factors. One could be the enhanced hydrogen trapping at defect sites due to lattice mismatch-induced vacancies at the GaN/Si interface. In addition, the reformation of Mg-H complexes in Mg-doped p-GaN, reactivating hydrogen-related deactivation, could be another potential cause.
To mitigate hydrogen permeation, dense metal-oxide dielectric passivation layers (30-nm-thick Al2O3 or HfO2) were deposited by ALD on patterned ITO prior to subsequent SiO2 deposition and annealing, as is shown in Figure 3. The morphology of the dielectric layer closely fits the etched surface morphology and is uniformly and densely deposited on the surface and sidewall of the mesa structure, which plays a good role in protecting the p-GaN surface and sidewall protection. The illustrated process shown in Figure 3 outlines the key steps in an ALD deposition process of a dielectric layer. The procedure begins with the introduction of the first gas-phase precursor, which undergoes chemisorption or surface reaction with the substrate. Excess precursor and byproducts are purged using an inert gas. Subsequently, the second precursor is introduced, reacting with the adsorbed first precursor to form a thin film. A final inert gas purge ensures the removal of unreacted precursors and reaction byproducts, completing one deposition cycle. This sequential, self-limiting mechanism enables precise, layer-by-layer growth of the dielectric film. Meanwhile, the rapid formation of byproducts and the cleaning up of inert gases can avoid H and H plasma generated during deposition. Control groups with varying SiO2 thicknesses and thermal treatments were included to evaluate hydrogen-blocking efficacy and thermal stability under back-end processing conditions.
The experiment comprised two material groups (Al2O3 and HfO2) under four conditions:
Control Group: No passivation, used for SEM cross-sectional analysis and probe-based insulation/conductivity evaluation;
Group 1: BOE etching to measure Al2O3/HfO2 etch rates, followed by ITO integrity and conductivity verification;
Group 2: 1-μm SiO2 deposition via PECVD, then full oxide removal via BOE;
Group 3: 2-μm SiO2 deposition followed by BOE wet etching;
Group 4: Post-SiO2 deposition baking at 350 °C for 3 h to assess thermal stability.
Experimental conditions are all summarized in Table 1.
3. Results
3.1. Characterization of Materials
Figure A1 displays the PL spectrum within the 550–677 nm visible red-light range, revealing a Wp of 609.98 nm and an FWHM of 57.29 nm. Notably, the vertical axis represents dimensionless relative intensity. The distinct main peak and uniform spectral profile validate the optical performance of the epitaxial structure, confirming the consistency of layer composition, thickness, doping conditions, and MOCVD growth parameters.
Room-temperature PL characterization was performed on the epitaxial wafers using a 375 nm excitation wavelength. Figure 4 presents the PL mapping of the full wafer surface, illustrating the spatial distributions of the peak wavelength (Wp) and full width at half maximum (FWHM), which provide critical insights into material uniformity. As shown, the Wp values are concentrated within 608–614 nm, while the FWHM ranges between 52 and 56 nm, which is respectable for InGaN-based Red LEDs. The observed uniformity in Wp and narrow FWHM distribution indicate excellent material homogeneity for silicon-based GaN, satisfying the requirements for subsequent device processing.
As described in Section 2.2, the wafers were cleaved after ITO patterning to isolate test structures for controlled experiments. Following Al2O3/HfO2 dielectric layer deposition, two samples from the control groups were retained for cross-sectional SEM analysis. As shown in Figure 5, the 100-nm-thick ITO layer and 30-nm-thick metal-oxide dielectric layers exhibit uniform thickness, distinct interfaces, and low defects. Lower-magnification SEM images further confirm the structural integrity of the multilayered wafer, which aligns with the epitaxial design illustrated in Figure 1a.
In this study, both Al2O3 and HfO2 films were grown using ALD, as discussed in Section 2.2, which is a technique known for its high precision in controlling film thickness and uniformity. The self-limiting deposition process of ALD ensures that each layer is formed with minimal defects, particularly at the interface. Take Al2O3 as an example. The deposition process results in a well-ordered Al-O bonding structure, where the oxygen and aluminum atoms are tightly and stably bonded, contributing to the high quality of the oxide layer. Furthermore, ALD minimizes interfacial defects between the dielectric films and the ITO films, ensuring the morphology of the dielectric layer is highly coincident with that of the ITO layer. The low defect density, along with the strong Al-O bonding, plays a crucial role in the performance of the films, providing a stable and efficient interface for avoiding hydrogen-induced deactivation of p-GaN. This controlled growth process is fundamental in achieving the desired material characteristics in this paper, and its influence on electrical and optical performances will be further discussed and verified in the next section.
3.2. Optimized Electrical and Optical Performance
Figure 6 and Figure A2 show the current-voltage (I–V) curves of devices treated with Al2O3/HfO2 passivation layers under different experimental conditions. The blue and red curves represent the Al2O3-passivated and HfO2-passivated groups, respectively. Figure 6a illustrates the conductivity of ITO after the complete removal of SiO2 and metal-oxide layers via BOE treatment. The results confirm the rationality of the BOE etch rates for the three materials (SiO2, Al2O3, and HfO2) while ensuring the integrity and normal electrical performance of the ITO layer. Therefore, the BOE etch rates of the oxides were applied in the subsequent control groups. Figure 6b displays the I-V curves after 1 μm SiO2 deposition. The leakage current densities for both devices were comparable (1.02 × 10−6 A/cm2 and 3.10 × 10−6 A/cm2), with both exhibiting low leakage and no significant disparity. This indicates effective control and optimization of sidewall damage during etching, as well as the negligible impact of the passivation process on leakage currents. Similar trends were observed in Figure 6c. Notably, in Figure 6d, after 3-h annealing, the leakage current increased by approximately one order of magnitude. This is attributed to enhanced carrier activity at high temperatures and the higher reactivity of hydrogen species, which promote the reformation of Mg-H complexes. The superior thermal stability of Al2O3 compared to HfO2 at 350 °C may arise from its amorphous structure, which avoids grain boundary defects commonly observed in polycrystalline HfO2 near 400 °C. In contrast, Al2O3 exhibits more uniform Al-O bonding and fewer interfacial defects. Regarding forward voltage, all groups demonstrated excellent consistency, achieving turn-on at approximately 2 V. The Al2O3-treated group exhibited faster current density escalation, reaching approximately twice the value of the HfO2 group at 7 V.
The IV characterization results conclusively demonstrate that the optimized metal-oxide dielectric layers effectively mitigated hydrogen-induced deactivation in the p-GaN layer. Under multiple control conditions, the forward voltage was significantly reduced to ~2 V, restoring device functionality while reversing leakage currents remained within acceptable limits. In summary, the passivation treatment endowed the devices with superior electrical performance, resolving pixel illumination failures without compromising existing process compatibility. Figure A3 shows the emission state of the p-layer mesa under the microscope after loading 3 V voltage on the probe station.
Figure 7 presents the electroluminescence (EL) spectra of red light under varying current densities and SiO2 thicknesses for both passivation materials, with corresponding Wp and FWHM values annotated. The Wp remained below 620 nm, and the FWHM clustered around 60 nm. Compared to the epitaxial wafer data in Figure 4, no significant changes in Wp or FWHM were observed after device processing, confirming that neither fabrication nor passivation adversely affected the intrinsic optical properties. Crucially, no SiO2 thickness-dependent intensity variations were detected, further validating the optical effectiveness of the passivation strategy.
To investigate the blue shift effect—a critical concern for red micro-LEDs—the dependencies of Wp and FWHM on current density were analyzed (Figure 8). Both Al2O3 (blue curves) and HfO2 (red curves) groups exhibited 10–20 nm blue shifts as current density increased from 100 to 300 mA. FWHM fluctuations remained within 20 nm, independent of passivation materials or process conditions. Interestingly, the 1-μm SiO2 group showed reduced blue shift above 200 mA, consistent with prior reports on red GaN epitaxial structures, where Wp initially decreases (blue shift) and then increases. This behavior is primarily governed by the epitaxial design and growth techniques rather than fabrication processes. In InGaN-based LEDs, blue shifts result from the interplay between quantum-confined Stark effects (QCSE) and band-filling effects, particularly pronounced in long-wavelength MQWs at high carrier densities. The stress-relief structures beneath the active region in our epitaxial design contributed to superior blue shift suppression compared to commercial red GaN epitaxial wafers.
Figure 9a,b compare the light-output power (LOP) and electroluminescence efficiency of the 1-μm SiO2 groups. In the figure, the blue and red curves represent the Al2O3- and HfO2-passivated groups, respectively. The LOP increased monotonically with current density, with the HfO2 group exhibiting higher LOP values than the Al2O3 group. Combined with the result in Figure 6b, the leakage current density of the Al2O3 group without high-temperature baking is slightly higher under reverse negative voltage, which may affect the light-output efficiency of the device. Electroluminescence efficiency, calculated as LOP/(I × V), showed significant droop at higher current densities—a universal phenomenon in InGaN-based LEDs attributed to increased non-radiative recombination rates. At higher current densities, the injected carrier density increases, leading to an enhanced rate of non-radiative recombination. This results in more electrons and holes recombining non-radiatively rather than emitting energy as photons, thereby causing a decrease in LED efficiency, with the optoelectronic conversion efficiency decreasing as current density increases [37]. Notably, both LOP enhancement and efficiency droop trends were similar across passivation materials, suggesting that the efficiency degradation originates from inherent epitaxial defects, for example, material imperfections or structural limitations, rather than process-induced surface states or hydrogen-related deactivation.
4. Conclusions
This study investigates the performance enhancement of InGaN red LED MESA on silicon substrate used for micro-LED through advanced dielectric layer passivation techniques, addressing critical challenges posed by hydrogen-induced deactivation during PECVD-SiO2 growth. By depositing high-density Al2O3 and HfO2 passivation layers using ALD, the proposed method effectively suppresses hydrogen permeation, maintains p-GaN activation, and ensures reliable p-type ohmic contact formation. The study suggests that both materials significantly reduced forward voltage to approximately 2 V and preserved low leakage current levels, resolving device failures observed in control groups.
Furthermore, the passivation layers demonstrated excellent compatibility with subsequent ALD treatments, with Al2O3 showing superior thermal stability under high-temperature annealing while HfO2 achieved higher LOP and efficiency at elevated current densities. Electroluminescence (EL) spectra confirmed that the passivation treatments did not adversely affect the intrinsic optical properties of the devices, as demonstrated by consistent Wp and FWHM distributions across varying conditions. The blue shift behavior observed in red LED under high current densities aligned with prior studies on epitaxial layer designs, further affirming the stability and reliability of the fabrication process. Additionally, the results indicated that efficiency droop under higher current densities was primarily governed by inherent epitaxial material limitations rather than process-induced defects.
In conclusion, the proposed ALD dielectric passivation approach addresses one of the bottlenecks in GaN-on-Si red micro-LED fabrication. These findings may contribute to the advancement of silicon-based GaN and red-emitting micro-LED technologies, offering scalable solutions for next-generation optoelectronic applications.
Conceptualization, H.Q. and X.G.; Data curation, H.Q., S.Z. and X.G.; Funding acquisition, X.G. and L.T.; Investigation, Q.F., X.N. and L.T.; Resources, Q.F., X.N., and L.T.; Visualization, H.Q.; Writing—original draft, H.Q.; Writing—review and editing, X.G. All authors have read and agreed to the published version of the manuscript.
Data are contained within the article.
The authors would like to thank Maxwell QH from the University of California, Irvine, for his contribution to the English language and style in this work, as well as the Shi-Cheng Laboratory for Information Display and Visualization for their valuable assistance.
The authors declare no conflicts of interest.
Footnotes
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Enlarge this image.Figure 1. (a) Schematic for the epitaxial structure of silicon-based red micro-LED; (b) Cross-sectional structure of the micro-LED used in this paper; (c) Schematic of the device process for micro-LED.
Enlarge this image.Figure 2. (a) I-V characteristic of p-GaN MESA before/after deposition of 1 μm SiO2 by PECVD; (b) The luminescence state of the p-GaN MESA under the microscope without SiO2 treated; (c) The luminescence state of the p-GaN MESA under the microscope deposited with 2 μm SiO2.
Enlarge this image.Figure 3. Process and principle of ALD growth process for dielectric passivation layer.
Enlarge this image.Figure 4. (a) PL mapping of Wp on the epi wafer at room temperature with a laser wavelength of 375 nm; (b) PL mapping of FWHM on the epi wafer at room temperature with a laser wavelength of 375 nm.
Enlarge this image.Figure 5. The cross-section morphology of the samples after deposition of the dielectric layer under SEM. (a) The cross-section morphology of 30 nm Al2O3 and 100 nm ITO; (b) The complete cross-section morphology of the sample deposited with Al2O3; (c) The cross-section morphology of 30 nm HfO2 and 100 nm ITO; (d) The complete cross-section morphology of the sample deposited with HfO2.
Enlarge this image.Figure 6. I-V characteristic for different treatment groups treated with Al2O3/HfO2. (a) I-V characteristic of ITO after BOE; (b) I-V characteristic of groups with PECVD 1 μm SiO2; (c) I-V characteristic of groups with PECVD 2 μm SiO2; (d) I-V characteristic of groups with PECVD 1 μm SiO2, 350 °C baking 3 h.
Enlarge this image.Figure 7. Wp and FWHM of pixels with different conditions under the injected current of 200 mA and 300 mA. (a) Wp and FWHM of pixels treated with Al2O3; (b) Wp and FWHM of pixels treated with HfO2.
Enlarge this image.Figure 8. Wp under different driving currents with passivation treatment. (a) Wp under different driving currents with passivation treatment, with PECVD 1 μm SiO2; (b) Wp under different driving currents with passivation treatment, with PECVD 2 μm SiO2.
Enlarge this image.Figure 9. (a) LOP under different driving currents with passivation treatment; (b) Efficiency under different driving currents with passivation treatment.
Experiment Design of Dielectric Layer Passivation.
| Group Number | Dielectric Layer | Thickness of SiO2 | Treatment |
|---|---|---|---|
| Control Group | Al2O3/30 nm | / | / |
| 1-1 | / | BOE for 3 min | |
| 1-2 | 1 μm | BOE for 8 min | |
| 1-3 | 2 μm | BOE for 15 min | |
| 1-4 | 1 μm | 350 °C Baking 3 h, BOE for 8 min | |
| Control Group | HfO2/30 nm | / | / |
| 2-1 | / | BOE for 6 min | |
| 2-2 | 1 μm | BOE for 11 min | |
| 2-3 | 2 μm | BOE for 18 min | |
| 2-4 | 1 μm | 350 °C Baking 3 h, BOE for 11 min |
Appendix A
Enlarge this image.Figure A1. Wp and FWHM on the epi wafer at room temperature with a laser wavelength of 375 nm.
Enlarge this image.Figure A2. I-V characteristic for different treatment groups treated with Al2O3/HfO2. (a) I-V characteristic of groups with PECVD 1 μm SiO2; (b) I-V characteristic of groups with PECVD 2 μm SiO2; (c) I-V characteristic of groups with PECVD 1 μm SiO2, 350 °C baking 3 h.
Enlarge this image.Figure A3. The emission state of the p-GaN MESA under the microscope on the probe station. (a) Group treated with Al2O3; (b) Group treated with HfO2.
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